	AREA    Init, CODE, READONLY
	
	ENTRY
	IMPORT c_entry
	
start
disabble_watch_dog
	mov r1,#0x53000000
	mov r2,#0x0
	str r2,[r1]
	
disablle_interrupt
	ldr r1,=0x4a000008
	mov r2,#0x0
	str r2,[r1]
	
	b memsetup
memsetup
	ldr r1,=MEM_CTL_BASE  
	ldr r2,=mem_cfg_val   
	add r3,r1,#52
1
	ldr r4,[r2],#4
	str r4,[r1],#4
	cmp r1,r3
	bne %1
	nop
	nop
	nop
	nop


beep_off
	ldr r0,=0x56000010
	mov r1,#0x1
	str r1,[r0]

	ldr r0,=0x56000014
	ldr r1,[r0]
	bic r1,r1,#0x1
	str r1,[r0]
	
	
led_test
	ldr r0, =0x20800000
	ldrb r1, =0xff
	strb r1, [r0]

	ldr r0,=0xfffff
delay1
	sub r0,r0,#1
	cmp r0,#0
	bne delay1
	
	ldr r0, =0x20800000
	ldrb r1, =0x0
	strb r1, [r0]
	
	ldr r0,=0xfffff
delay2
	sub r0,r0,#1
	cmp r0,#0
	bne delay2
	
	
	;ldr r0,=0xfffff
;delay
	;sub r0,r0,#1
;	cmp r0,#0
	;bne delay

	
	
clock_set
	ldr r0,=0x4c000018
	mov r1,#0x0
	str r1,[r0]
	
	mrc p15,0,r1,c1,c0,0
	orr r1,r1,#0xc0000000
	mcr p15,0,r1,c1,c0,0
	
	ldr r0,=0x4c000000
	ldr r1,=0x00ffffff
	str r1,[r0]
	
	
	
	ldr r0,=0x4c000008
	ldr r1,=0x00038042
	str r1,[r0]
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	
	ldr r0,=0x4c000004
	ldr r1,=0x00044011
	str r1,[r0]
	
	
	;ldr r0,=0x4c00000c
	;ldr r1,=0x00fffff0
	;str r1,[r0]
	
	;ldr r0,=0x4c000010
	;ldr r1,=0x00000004
	;str r1,[r0]
	
	ldr r0,=0x4c000014
	ldr r1,=0x00000007
	str r1,[r0]
	
	;ldr r0,=0x4c000000
	;ldr r1,=0x00ffffff
	;str r1,[r0]
	
	b sdram_test
	
MEM_CTL_BASE EQU 0X48000000

mem_cfg_val
	DCD 0x22111110
	DCD 0x00000700
	DCD 0x00000700
	DCD 0x00000700
	DCD 0x00000700
	DCD 0x00000700
	DCD 0x00000700
	DCD 0X00018005
	DCD 0X00018005
	DCD 0X008E0459
	DCD 0X000000B1
	DCD 0X00000030
	DCD 0X00000030
	
sdram_test
	mov r1,#0xff
	ldr r2,=0x30001000
	str r1,[r2]
	;b led_test
	

	
entry_c
	ldr sp,=0x1000
	b c_entry
	

	
	end
	
	
	
	
	
	
	
	